Samsung Unveils 'Rear Power Supply'... TSMC and Intel Also Near Adoption

BSPDN, Innovative Technology That Reverses Power Supply Method
Samsung Electronics to Introduce in 2027 2nm Process
Intel Expected in Second Half, TSMC to Apply in 2026

Samsung Electronics announced that it will introduce a 2nm (nanometer; 1nm is one billionth of a meter) process with Backside Power Delivery Network (BSPDN) technology in 2027, intensifying competition in the foundry (semiconductor contract manufacturing) industry. With Taiwan's TSMC and the US-based Intel also planning to adopt BSPDN technology for sub-2nm processes, industry attention is focused on the technological competition among leading companies in advanced processes.

Samsung Electronics foundry (semiconductor contract manufacturing) process roadmap image. On the 12th (local time), the company held the 'Samsung Foundry Forum 2024' in Silicon Valley, USA, and announced that it will introduce the 2-nanometer process (SF2Z) applying Backside Power Delivery Network (BSPDN) technology in 2027. /
[Image courtesy of Samsung Electronics]

BSPDN is an innovative technology that reverses the traditional method of supplying power to semiconductors. Previously, semiconductors had metal wiring laid along circuits on top of transistors (devices) for current and signal transmission. However, as technological advancements have narrowed circuit linewidths and reduced wiring area, various noises have occurred. In response, current wiring was moved to the backside of the semiconductor to reduce interference, thereby enhancing chip performance and simultaneously improving power efficiency through BSPDN technology.

Intel plans to introduce its BSPDN technology, called ‘PowerVia,’ in products using its 20A (2nm-class) process scheduled for the second half of the year. To implement this, Intel has revealed specific plans to reduce the thickness of the wafer on which the semiconductor is fabricated and apply nano Through-Silicon Via (TSV) technology, which electrically connects the chip by drilling tiny holes. The desktop PC processor ‘Arrow Lake,’ set to be released in the fourth quarter, will be produced using the 20A process and will feature PowerVia.

TSMC has announced that it will apply its proprietary BSPDN technology, ‘Super Power Rail (SPR),’ starting in 2026. During its early-year earnings conference call, TSMC stated that SPR would be introduced in the 2nm process in 2026, and in April, it announced plans to implement the technology in the A16 (1.6nm) process to be launched in 2026. If SPR is first applied to the 1.6nm process, the process implementation may be delayed compared to previous schedules, but the introduction timing is expected to remain the same. Recently, Taiwanese media such as United Daily News reported that TSMC might apply SPR to the 2nm process from 2025 by adopting next-generation extreme ultraviolet (EUV) lithography equipment called ‘High Numerical Aperture (NA).’

An industry insider said, "By placing the current wiring layer on the backside of the wafer, current can be supplied directly to the transistor, reducing power consumption," adding, "BSPDN is an essential technology in many respects for advanced processes." The insider further explained, "Given the high technological importance in advanced processes, all foundry companies have rushed to announce plans to adopt it."