Choi Woo-jin, Vice President of SK Hynix, "P&T Technology Innovation, Core of Semiconductor Hegemony Competition"

Interview with Choi Woo-jin, Vice President in charge of P&T

Choi Woo-jin, Vice President in charge of memory packaging at SK Hynix, expressed his ambition to "contribute to the development of the highest performance memory with advanced packaging technology in the era of artificial intelligence (AI), where demand for high-performance chips is surging."

Choi, who leads SK Hynix's semiconductor post-process organization P&T (Package & Test), said in an interview released on the SK Hynix Newsroom on the 11th, "P&T technology innovation is emerging as a key factor determining semiconductor supremacy competition."

Choi Woo-jin, Vice President in charge of P&T at SK Hynix.
[Photo by SK Hynix Newsroom]

Vice President Choi is an expert in the post-process field who has devoted the past 30 years to research and development (R&D) in memory semiconductor packaging. The P&T team he oversees is responsible for taking wafers that have completed all processes at the fab (semiconductor manufacturing plant), packaging them into product forms, and testing whether they operate according to customer requirements.

He said, "We are focusing on 'signature memory' that meets customer demands for various functions, sizes, forms, and power efficiency in line with the AI era."

He continued, "To realize this, we are advancing technologies such as Through Silicon Via (TSV), which plays a key role in high-bandwidth memory (HBM) performance, and MR-MUF, while concentrating on developing various advanced packaging technologies like chiplets and hybrid bonding that help combine heterogeneous components such as memory and non-memory, contributing to the development of new types of semiconductors."

Vice President Choi emphasized, "In this process, we will challenge without limits and demonstrate strong technological superiority."

He also contributed to strengthening SK Hynix's leading position in AI memory by quickly securing production lines to respond to the surge in DRAM demand following the ChatGPT craze.

He introduced, "Last year, as AI memory demand suddenly increased, immediate response was difficult, but we swiftly utilized the TSV packaging line to increase production of DDR5 DRAM-based server 3DS module products without additional investment. This was a case where a bold decision made in a short time proved effective."

Vice President Choi played a key role in the planning process for SK Hynix's recently announced packaging production facility construction plan in Indiana, USA, including devising fab construction and operation strategies.

He said, "We are currently concretizing fab design and mass production systems and preparing to establish an R&D cooperation ecosystem with global companies. Once the factory operation is in full swing, it is expected to greatly contribute to strengthening the company's AI memory technology and business leadership."

Vice President Choi emphasized, "In the short term, we will strengthen domestic production capabilities to meet HBM demand and maximize profitability by effectively utilizing global bases. In the long term, our goal is to secure innovative packaging technologies like MR-MUF, which is currently the core of HBM."