Online Session on "HBF Technology: Workload Analysis and Roadmap Briefing"
Research Shared with Industry, Academia, and Research Institutes in Korea and Abroad
Kim Jungho, Professor, Department of Electrical and Electronic Engineering, KAIST
Kim Jeongho, Professor at the Department of Electrical and Electronic Engineering, Korea Advanced Institute of Science and Technology (KAIST), who is known as the "father of HBM (High Bandwidth Memory)," has stated that in his research on HBF (High Bandwidth Flash), he will work in collaboration with companies and focus on securing patents.
On the 10th, Professor Kim held an online session titled "HBF Technology: Workload Analysis and Roadmap Briefing," where he presented his research to researchers from industry, academia, and research institutes in Korea and abroad. In a phone interview with The Asia Business Daily, he said, "Unlike HBM, whose development has been driven mainly through corporate research projects, we will, for HBF, a next-generation AI memory, fully launch a research strategy that actively involves collaboration with companies and explicitly targets patent acquisition." By securing patents, he aims to help the Korean semiconductor industry maintain technological leadership in the competition over next-generation AI memory.
HBF is a next-generation AI memory that, unlike HBM, which vertically stacks volatile DRAM to maximize bandwidth, vertically stacks non-volatile NAND flash to achieve both large capacity and high bandwidth at the same time. It is drawing attention as an alternative to meet the rapidly growing demand for data processing in the training and inference of ultra-large AI models.
During the briefing, based on HBF-related research accumulated so far, he disclosed the architecture and structure, performance, workload characteristics, and development roadmap for next-generation agentic AI. He analyzed AI semiconductor computing characteristics and presented how HBF can be used in real systems. He also introduced design and optimization methodologies that use AI to encompass the entire memory system, including HBM, HBF, and SSDs.
This briefing was designed not as a presentation limited to a specific company or internal stakeholders, but as an open technology session that global researchers can freely access. Taking this opportunity, Professor Kim plans to move beyond lab-centered technology proposals, actively seeking ways to pursue joint projects with companies and to link research outcomes to patents.
KAIST Tera Lab, led by Professor Kim, has been deeply involved in HBM architecture and design, as well as the commercialization process, for more than 20 years. In particular, it is recognized for contributing to the accumulation of core technologies such as TSV (Through-Silicon Via), interposers, and signal and power integrity, based on design experience gained through corporate research projects.
A member of the lab said, "This will serve as a venue to share research results at an early stage and to jointly discuss industry-academia-research collaboration and the potential for technology commercialization." After the event, the briefing video will be released on YouTube via the KAIST Tera Lab website.
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