Key Technology for Next-Generation AI Chips
Significant Increase in US Patent Applications
Plans to Commercialize Co-Packaged Optics
Expected to Boost Performance of Nvidia's "Rubin"
Taiwanese foundry (semiconductor contract manufacturing) company TSMC is rapidly securing patents in the field of "silicon photonics," a core technology for next-generation artificial intelligence (AI) chips, as it moves to take the lead in the market. This is seen as a strategy to solidify its position as the world’s number one foundry.
On September 8, local media including Taiwan Economic Daily News, citing Japanese reports, stated that TSMC is significantly increasing its patent applications related to silicon photonics in the United States. The number of applications filed so far this year is more than double that of Intel, marking a sharp increase compared to 2023, when the gap between the two companies was not significant.
Silicon photonics is a technology that transmits signals within semiconductor chips using light instead of electricity. While electricity slows down as it collides with atoms inside wires, light travels in a straight line at 300,000 km per second, enabling much faster and more efficient data transmission.
TSMC plans to apply this technology to its advanced packaging processes to commercialize "Co-Packaged Optics (CPO)." The industry expects that this technology will also be used in Nvidia’s next-generation graphics processing unit (GPU), "Rubin," which is scheduled for release next year, thereby driving performance improvements.
Global foundry companies such as TSMC and Samsung Electronics have reportedly been focusing their research and development (R&D) efforts on commercializing CPO based on this technology. This is because customers such as Nvidia are rapidly increasing the data transfer volume and speed required for their future AI chips, and the development of CPO using silicon photonics is considered absolutely essential to achieve this.
TSMC’s recent strong commitment to this technology has drawn significant attention within the industry. In addition to making large investments, the company unveiled its vision to integrate silicon photonics technology into various manufacturing processes at the "North America Technology Forum" held in Santa Clara, California, in April. Specifically, TSMC announced that it had completed validation of "COUPE" (stacking electronic dies on photonic dies) this year, and that next year, it plans to apply silicon photonics to its advanced packaging technology "Chip on Wafer on Substrate (CoWoS)" to create "co-packaged optical components." Furthermore, TSMC is collaborating with Marvell Technology, a U.S.-based company specializing in application-specific integrated circuits (ASICs) and high-speed network chips, to respond to the expanding silicon photonics market and to develop next-generation silicon photonics technology for processes at 3nm (1nm = one billionth of a meter) and below.
The industry anticipates that as TSMC’s silicon photonics technology becomes more advanced, mass production and release of Nvidia’s next-generation AI chips, its major customer, will accelerate. It is reported that Nvidia has also decided to extensively adopt silicon photonics technology in its AI GPU "Rubin," scheduled for release next year, by utilizing 2.5D and 3D packaging such as CoWoS. Through this, Nvidia hopes to resolve bottlenecks and excessive power consumption issues caused by chip-to-chip connections using electricity.
Taiwan Economic Daily News = Reporters Yun Huizong and Li Mengsan / Translated by Asia Economy
※This column was published through a strategic partnership between Asia Economy and Taiwan Economic Daily News.
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