ETRI Develops 'Accelerator Chip' for Supercomputers... "Challenging Supercomputer Manufacturing Countries"

A domestic research team has succeeded in developing an ‘accelerator chip’ for supercomputers. Accelerator chips are core technologies used to increase the calculation speed of supercomputers. The research team expects that the developed accelerator chip will serve as a stepping stone to include Korea among the ranks of supercomputer manufacturing countries in the future.

The Electronics and Telecommunications Research Institute (ETRI) announced on the 30th that it has developed a supercomputer accelerator chip in the form of a system on chip (SoC, codename ‘K-AB21’).

Researchers who developed the nation's first accelerator chip and compute node for supercomputers are posing for a commemorative photo. Photo by Korea Electronics and Telecommunications Research Institute

The accelerator chip developed by ETRI measures 77㎜ x 67㎜ and was manufactured using a 12-nanometer process. The accelerator integrates a general-purpose processor and a 64-bit parallel arithmetic unit, delivering 8 teraflops (TFLOPS) performance for double-precision floating-point (FP64) parallel processing. One 3U-sized compute node can accommodate up to two accelerator chips, including a liquid cooling system.

Currently, supercomputers are only domestically produced in four countries: the United States, China, Japan, and France. These countries are enhancing computational performance by adopting general-purpose accelerators.

However, general-purpose accelerators focus on precision calculations for artificial intelligence, making them less efficient for traditional supercomputers that require high-precision calculations. Neural Processing Units (NPUs), accelerators for AI inference, support only low-precision calculations, making them unsuitable for accurate scientific computations and precise engineering simulations.

To address these issues, ETRI independently developed core technologies including a supercomputer accelerator chip (SoC), software (SW), and compute nodes aimed at accelerating traditional high-precision supercomputer applications. The developed accelerator chip contains ▲ high-performance cores ▲ over 4,000 parallel floating-point units ▲ ultra-high-speed interfaces such as DDR5 and PCIe GEN5. The software consists of a compiler, runtime, and device drivers.

ETRI is also looking at the possibility of entering the global market with the developed supercomputer accelerator. To this end, ETRI plans to participate in the world’s largest supercomputing technology exhibition held in Atlanta, USA, this November to demonstrate the functionality verification of the domestically developed supercomputer accelerator. In the first half of next year, it will promote a demonstration integrating high-performance computing servers and software.

Han Woo-jong, a research fellow at ETRI’s Supercomputing Systems Research Laboratory, said, “We will ensure that domestic technology can replace the accelerator market, which is monopolized by global big tech companies, at least in the supercomputer field. We hope that ETRI’s achievement will help transform supercomputing systems, which have so far been entirely dependent on foreign products, into domestic technology.”