[Chip Talk] 'The Semiconductor Packaging War Triggered by NVIDIA GPUs'... Foundries Also Preparing for 'Advancement'

After Nvidia H100, the Concept of Traditional Post-Processing Changes
Taiwan TSMC Leads Packaging Technology, Samsung Electronics Chases

"Even in difficult situations, there must be no wavering in nurturing talent and investing in future technologies."

This is what Lee Jae-yong, Chairman of Samsung Electronics, said while touring the semiconductor production lines at the Cheonan and Onyang campuses in February this year. His remark drew significant attention from the industry because it was made at the Cheonan and Onyang packaging plants, not at the Hwaseong foundry (semiconductor contract manufacturing) plant in Gyeonggi Province. The statement reflects the urgency that if Samsung falls behind in packaging, the semiconductor business itself is doomed. This is also why Chairman Lee visited the Cheonan and Onyang packaging plants early this year.

Samsung Electronics Chairman Lee Jae-yong visited the Samsung Electronics Cheonan Campus on the 217th day to tour the package line and review business strategies.
[Photo by Yonhap News]

The flagship product H100 of Nvidia, the world's leading artificial intelligence (AI) semiconductor company, connects a graphics processing unit (GPU) for computation and a high-bandwidth memory (HBM) semiconductor for data storage as if they were a single chip. The emergence of the H100 has changed the concept of semiconductor back-end (post) processing.

Traditionally, back-end processing refers to packaging work before product shipment, following the front-end process of printing circuits on silicon wafers. It involved dicing the wafer into individual chips, creating electrical pathways, and shaping the exterior. Now, heterogeneous integration, which connects different types of semiconductors to create a single system (non-memory) semiconductor like the H100, is widely used. Instead of cutting the wafer into individual chip sizes and then shaping them, multiple chips are placed on the wafer and packaged directly. The current trend is to distinguish back-end processing and packaging, which were previously classified under the same concept, as separate processes.

The issue is that not only memory semiconductor companies but also foundry companies are pouring all their capabilities into advancing packaging technology. Fabless companies like Apple and Qualcomm entrust their orders to foundry companies that perfectly handle both front-end and back-end processes. This means the market is not a competition solely among memory companies like Samsung Electronics, SK Hynix, and Micron.

The company leading packaging technology is Taiwan's TSMC, the world's number one foundry. TSMC developed chiplet technology in 2011. Chiplets are a technology that connects semiconductor chips with different functions like Lego blocks to create high-performance semiconductors. This technology is essential for 2.5D packaging. 2.5D packaging involves placing HBM semiconductors on a flat substrate for packaging. System-memory semiconductors are arranged horizontally. Conversely, stacking them vertically results in 3D packaging. TSMC has developed 2.5D packaging up to the 5th generation.

Samsung Electronics began its pursuit in 2.5D packaging technology with 'I-Cube' starting in 2021. Mass production of I-Cube is expected to be possible as early as next year. From the second quarter of next year, I-Cube 4, which arranges four HBMs together with GPUs, will be mass-produced, and in the third quarter, I-Cube 8, which arranges eight HBMs, will be mass-produced.

Unlike TSMC, Samsung Electronics, which also operates a memory semiconductor business, has started a turnkey service that handles packaging throughout the chip production process. It is reported that this service has led to orders for HBM and advanced packaging services from AMD in the United States. Samsung Electronics is also accelerating organizational restructuring and talent recruitment in the packaging field. The DS (Device Solutions) division of Samsung Electronics organized the 'Advanced Package (AVP) Business Team' last year and recruited new and experienced employees in March and July. Lin Jingcheng, who developed 3D packaging technology at TSMC, was hired as the vice president of the AVP Business Team.

SK Hynix is also constructing a $15 billion advanced packaging and research and development (R&D) center in the United States. The site is currently being scouted. Technologically, it has the highest level of TSV (Through Silicon Via) process capability in Korea. In 2013, it developed the first HBM semiconductor product in Korea using the TSV process. TSV is an advanced packaging technology that thins the chip, drills hundreds of tiny holes, and connects electrodes vertically through the holes between the upper and lower chips.

The packaging market has high growth potential. Market research firm Gartner forecasts that the global packaging market will grow from $57.4 billion (approximately 76 trillion KRW) this year to $64.9 billion (approximately 86 trillion KRW) by 2025. However, Korea is evaluated to have a weaker packaging industry ecosystem compared to competing countries. Non-premium products from Samsung Electronics and SK Hynix still often outsource back-end processing to OSAT (Outsourced Semiconductor Assembly and Test) companies.

To reduce costs and improve production efficiency, an organic supply chain ecosystem between foundry, memory companies, and OSAT firms is necessary, but Korea's supply chain competitiveness is weak. According to Gartner's survey, Korean companies accounted for only 4.5% of the $40.39 billion (53.4 trillion KRW) revenue of the world's top 25 OSAT companies last year, with $1.818 billion (2.4 trillion KRW). The top three companies?Taiwan's ASE, the United States' Amkor, and China's JCET?monopolize 45.1% of the global market share, and 11 of the top 25 companies (44%) are Taiwanese. Korean companies number only four (16%), all outside the top 10.