[Taiwan Chip News] TSMC's '3nm' Demand Exceeds Supply... Simultaneous Domestic and Overseas Production Increase

3nm Monthly Production Capacity Up to 130,000 Wafers by Year-End
A18 Chip Orders for iPhone 16 Flood In
Taiwan Packaging Firms 'Winstek & Sigurd' See Increased Order Performance

The monthly production capacity of TSMC, a Taiwanese foundry (semiconductor contract manufacturing) company, for its 3nm (nanometer, one hundred millionth of a meter) process is expected to reach up to 130,000 wafers (semiconductor substrates) by the end of the year, but demand still exceeds supply. In particular, with large orders continuing for the A18 processor chip to be installed in Apple's iPhone 16 series, not only TSMC but also Taiwan's packaging industry is benefiting.

An employee is talking with a customer at the TSMC headquarters in Hsinchu Science Park, Taiwan.
[Photo by AFP Yonhap News]

According to the semiconductor industry on the 16th, TSMC is simultaneously pushing for increased production both domestically and internationally due to the surge in demand for the 3nm process. Despite significantly increasing production capacity, it is still unable to meet demand. Experts predict that TSMC's monthly production capacity for the 3nm process will reach at least 80,000 wafers by the end of the year, with the possibility of expanding to 100,000 wafers thereafter.

It has been reported that TSMC plans to establish a 15,000 wafer monthly production capacity for the 3nm process at its factories in the United States and Japan respectively. The total monthly production volume is expected to increase to a maximum of about 130,000 wafers. Regarding these expansion plans, TSMC stated, "We do not comment on market rumors" and "We will only officially announce disclosures as required by law."

TSMC believes that to rapidly expand its monthly production capacity from 80,000 to 100,000 wafers, an additional factory capable of producing 20,000 wafers is necessary. However, due to insufficient time to build a new factory, the industry expects TSMC to continue its strategy of converting some 5nm process equipment to 3nm process to secure production capacity for the time being. TSMC announced that over five years from 2020 to this year, the production capacity growth rate for 3nm, 5nm, and 7nm processes will reach 25%.

With the full-scale launch of TSMC's 3nm process, large orders for the A18 chip to be installed in Apple's iPhone 16 series are continuing. Additionally, orders for the latest 5th generation (5G) mobile communication flagship chipsets from MediaTek and Qualcomm, as well as new 3nm chipsets from Nvidia and AMD, are pouring in, causing a surge in demand not only for TSMC but also for packaging companies.

According to the industry, Apple is TSMC's largest customer for the 3nm process, and TSMC directly handles the packaging and testing of Apple's 3nm chips. However, as production of 3nm chips by MediaTek, Qualcomm, Nvidia, and AMD accelerates, order performance for other packaging companies such as ASE and King Yuan Electronics (KYEC) is also increasing. In particular, with Nvidia's new product orders expected to more than double in the fourth quarter, order performance for Taiwanese packaging companies Winstron and Sigurd is also expected to rise.

MediaTek and Qualcomm are scheduled to release their latest 5G flagship chips, 'Dimensity 9400' and 'Snapdragon 8 Gen 4,' respectively, next month. Packaging and testing for these chips are expected to be handled by ASE, KYEC, and Sigurd. Due to their high-efficiency and low-power designs, testing times are expected to more than double, and hourly testing fees are also projected to increase. ASE and Sigurd's utilization rates and profitability are expected to improve as well.

Furthermore, as Nvidia's AI chip production increases, it is anticipated that TSMC's 'Chip on Wafer on Substrate (CoWoS)' technology alone will not be sufficient to meet demand. Therefore, ASE and KYEC are likely to secure additional orders. Nvidia is mass-producing AI chips based on the Blackwell architecture, including the GB200 and B series, and ASE and KYEC's Nvidia packaging order volumes for the fourth quarter are expected to more than double compared to the previous quarter.

ASE's packaging and testing utilization rate is expected to increase from about 60% in the second quarter to 65% in the third quarter, with a target utilization rate of 70% in the fourth quarter. For KYEC, the testing time for new chips has increased by 2 to 3 times compared to before, which is expected to positively impact performance this year and next year. The industry expects AI chips to account for more than 30% of KYEC's sales next year, and KYEC is expanding its AI chip-related order opportunities by increasing advanced semiconductor inspection equipment such as burn-in testers.

Taiwan Economic Daily News = Zhong Huiling, Li Mengshan / Translation = Asia Economy

※ This article is reprinted based on a strategic partnership between this publication and Taiwan Economic Daily News.