Memory Innovation on Two Axes: CXL and HBM
Samsung Electronics introduced several next-generation memory semiconductor solutions leading the artificial intelligence (AI) era, such as Compute Express Link (CXL) and High Bandwidth Memory (HBM), at Silicon Valley in the United States. The company also announced plans to continue technological innovation based on two product axes to address the increasing memory performance challenges.
Samsung Electronics announced that Vice President Jin-hyuk Choi, head of the Americas Memory Research Center, and Vice President Sang-jun Hwang, head of the DRAM Development Office, delivered the keynote speech at 'MEMCON 2024' held on the 26th (local time) at the Computer History Museum in Mountain View, California. Vice Presidents Choi and Hwang explained that CXL-based memory and high-performance, high-capacity HBM solutions are driving innovation in the industry in the AI era. They also emphasized that in terms of capacity, CXL, and in terms of bandwidth, HBM technology will lead the future AI era.
CXL is a next-generation interface based on the high-speed input/output interface standard (PCIe) that connects central processing units (CPUs), accelerators, and DRAM used in high-performance server systems to increase data processing speed. It has great advantages in increasing capacity by enhancing memory scalability. HBM is a high-performance, high-capacity DRAM that stacks multiple DRAM chips to significantly increase bandwidth. Bandwidth refers to the amount of data that can be transmitted in a given time, and the larger the bandwidth, the more data can be transmitted quickly.
Vice President Choi announced various innovative solutions based on CXL that day. The introduced CXL Memory Module (CMM) products include 'CMM-D (DRAM)', 'CMM-H (Hybrid)', which uses both NAND and DRAM, and 'CMM-B (Box)', a memory pooling solution. CXL memory pooling is a technology that manages memory used by multiple servers as a single pool. Vice President Choi stated that memory capacity and bandwidth can be greatly improved through CXL-based solutions and said, "We will lead semiconductor technology development in the AI era through continuous memory innovation and strong cooperation with partners."
Vice President Hwang introduced Samsung Electronics' DRAM and HBM solution technologies and pledged to continue leadership in high-performance, high-capacity memory in the AI era. Following the currently mass-produced HBM 3rd generation (HBM2E) and 4th generation (HBM3) products, Samsung plans to mass-produce 12-stack 5th generation (HBM3E) and 32Gb (gigabit)-based 128GB (gigabyte) Double Data Rate (DDR) 5 products in the first half of the year. For the 6th generation (HBM4) products, the company plans to continue memory semiconductor innovation for the AI era by introducing logic processes into the buffer die.
Samsung Electronics showcased innovative products such as CMM-B, CMM-D, CMM-H, and 12-stack HBM3E introduced in the keynote speech at the MEMCON exhibition booth that day.
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