Rapidly Evolving Computing Environment
Focus on Enhancing Memory Performance and Convergent Technologies
President Kwak Nojeong: "Attention to Package and PIM Alternatives"
Global Semiconductor Companies Continue Package Investment Competition
Director Kim Hyeongjun: "Nation-Led R&D and Talent Development Needed"
Kwack No-jeong, President of SK Hynix, is delivering a keynote speech at SEDEX 2022 held at COEX in Samseong-dong, Seoul. / Photo by Kim Pyeong-hwa
[Asia Economy Reporter Kim Pyeonghwa] "In addition to memory core technology, the role of packaging will become increasingly important in the future." (Kwack Nojeong, President of SK Hynix)
"One of the reasons Samsung Electronics is lagging behind TSMC in system foundry is packaging." (Kim Hyeongjun, Head of Next-Generation Intelligent Semiconductor Business Unit)
President Kwack and Director Kim made these remarks as keynote speakers at the '24th Semiconductor Exhibition (SEDEX) 2022' held on the afternoon of the 5th at COEX, Samseong-dong, Seoul. SEDEX is a comprehensive semiconductor exhibition hosted annually by the Korea Semiconductor Industry Association.
On this day, President Kwack, as chairman of the Korea Semiconductor Industry Association, spoke on the theme "Beyond the Limits of Memory Technology," mentioning the performance limits of memory and packaging technology as an alternative. Director Kim emphasized the necessity of fostering a state-led packaging business under the theme "Leading Packaging Strategy for Semiconductor Super-Gap Competitiveness."
Alternatives to Memory Performance Limits: PIM and Packaging
In his keynote speech, President Kwack pointed out that while computing environments are rapidly advancing and high-performance demand is increasing, there are limits to improving memory performance. He explained that developing memory core technology is important, but additional alternatives are needed to meet performance demands.
President Kwack identified packaging technology and intelligent semiconductors (PIM) as these alternatives. He explained that while packaging technology used to develop by reducing thickness, it is now evolving with a focus on performance through various convergent technologies. Representative examples include the advancement of TSV-based vertical stacking technology and chiplet technology that connects logic and memory semiconductors to enhance overall performance.
PIM stands for Processing In Memory, referring to memory semiconductors equipped with processing functions. Simple computations can be handled within the memory itself to meet performance demands. SK Hynix introduced the PIM-based graphics DRAM 'GDDR6-AiM' last February.
Meanwhile, President Kwack mentioned that the semiconductor industry has faced significant difficulties over the past two years due to supply chain issues. With intensified semiconductor competition between countries and increasing importance of environmental factors such as abnormal weather, business challenges are growing. Ultimately, he explained that strengthening cooperation between material, parts, and equipment suppliers and semiconductor manufacturers, along with enhancing Environmental, Social, and Governance (ESG) management, is the answer. Talent development is also essential.
President Kwack said, "Although cooperation existed in the past, now a higher level of collaboration is required," adding, "As semiconductor competition between countries intensifies and sustainable cooperation becomes necessary, the ecosystem will enter a stage where material, parts, and equipment suppliers and chip makers collaborate together." He also explained, "In the case of SK Hynix, when the Yongin cluster starts operation in 2027, we have plans for a higher level of win-win cooperation."
Kim Hyung-jun, Head of the Next-Generation Intelligent Semiconductor Business Group, is delivering the keynote speech at SEDEX 2022 held at COEX in Samseong-dong, Seoul. / Photo by Kim Pyeong-hwa
"Semiconductor Packaging is the Answer"… State-Led R&D and Talent Development Support Essential
Director Kim referred to Moore's Law announced by Intel founder Gordon Moore in 1965 to emphasize the importance of packaging technology. Moore predicted that the number of integrated transistors would double every two years and that costs would increase once this phenomenon reached its limit. He also foresaw a semiconductor technology shift from making one single chip to dividing it into multiple parts.
Director Kim explained that while arranging multiple single chips increases chip size, dividing and connecting them as chiplets reduces chip size and improves yield (the ratio of good products among finished products) and performance. He also emphasized, "The future direction is to manufacture CPUs and GPUs at 5 nanometers and modems at 14 nanometers to reduce costs."
Since inter-chip connections are important, the semiconductor industry is forming the UCIe (Universal Chiplet Interconnect Express) consortium. UCIe is an organization established by Intel to create standards for semiconductor packaging technology. Samsung Electronics, TSMC, Qualcomm, AMD, and others are members. Intel recently emphasized expanding an open semiconductor ecosystem through the UCIe consortium at its event.
Director Kim stressed that with leading semiconductor companies such as Intel, TSMC, and Samsung Electronics continuing to invest in packaging technology, national-level support is essential to grow the post-processing (OSAT) industry including packaging. Since Korea's share in the global OSAT market is only 6%, challenges such as promoting research and development (R&D), creating an industry-academia cooperation ecosystem, and nurturing talent must be addressed.
Director Kim proposed, "If the government supports and assists these three tasks, it can foster technology and industry in the very important post-processing packaging field at the national level."
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